Central Act
21
Section 21. Assignability and transmissibility of registered layout-design.
The Semiconductor Integrated Circuits Layout-Design Act, 2000
In forceAll India (Central Act)
21. Assignability and transmissibility of registered layout-design. Notwithstanding anything in any other law to the contrary, a registered layout-design shall, subject to the provisions of this Chapter, be assignable and transmissible whether with or without the goodwill of the business concerned.